వెంకట రాజు

ఇవి ఇవ్వటములోఉద్దేశము... DSP engineer  కావాలనుకునేవారు 12 ఏళ్ళలో ఏమేం చేస్తారో క్లుప్తముగా తెలపటమే...

 Venkat to Vikram bhayyaa....,

20-01 -16 is fine to me.

Topic     : Video and Image processing( Video and image compression, scaling, color formats and        

               conversions,.. their applications ,..etc and demo )

Duration : round 3 to 4 hours

Professional Summary 12 years experience in the development of DSP algorithms on embedded platforms for automotive and semiconductor OEMs.

Involved in the development of Surround view systems and Scene view processing algorithms on TDA2H (TI ADAS processor) and successfully delivered to top Germany and USA automotive OEMS. Technical Skills

 Video/Image Compression: H.264,H.263, 2D-3D Video, MPEG4,, M-JPEG, FFMPEG, JPEG

 Automotive: Surround view Systems, Object detection, Machine learning, Scene view processing, Video rendering, SPICE process, MISRA,SPI, CAN, LIN and UART protocols.

 RTOS: Integrity from Green Hills, TI SYSBIOS  Version Control : SVN, CVS, GIT, Serena dimensions

 Processors: ARM, 32-bit microcontrollers, TI ADAS processor TDA2H, TDA2E.

 Packages/APIS: Matlab, Simulink, Openmax, OpenGL and Gstreamer

 Emulators and debugging tools: Micro softVC++, ARM ADS, CCS, SVN, CVS.

 File Formats: MP4, MOV, AVI, FLV

 Programming languages: Embedded C, C++, Assembly ARM, CUDA, SSE2, Intel- MMX, Python and Perl.

 Education: Master of Technology, Electrical Engineering, IITB, India.

Specialization: Communication and DSP Engineering (Feb 2003).

Bachelors of Engineering, Electronics and Communications Engineering, Andhra University, India (July 2000)

Certifications

 Matlab, Signal Processing, Cranes Varsity, India (Dec 2003)

 C++ for Embedded Developers, Febhas Limited, United Kingdom (May 2013)

Machine Learning from Stanford University, USA. Through online Coursera. (Oct 2014 - Dec 2014)

Heterogeneous Parallel Programming from University of Illinois at UrbanaChampaign, USA. Through online Coursera. (Jan 2015 –April 2015)

 Experience

1. Lead DSP Engineer at ___Systems, Ireland. (October 2011 to Present)

Project #1: Vehicle Video Recording System. Description: Lead the development of Triggered Video Recording(TVR) system using multiple cameras surrounding to the car, the system uses multiple cameras positioned around the vehicle to capture synchronized images at 30 fps, the captured video is compressed in H.264 format and it embed into the AVI container and will be stored USB storage device, The parameters like encoded video resolution, frame rate and encoded video either tiled mosaic from four cameras or full screen video from single camera depends on vehicle CAN network messages. Triggered Video Recording (TVR) embeds the odometer data such as speed, steering angle and acceleration inside the elementary h264 compressed video for accident investigation purpose. ENVIRONMENTS: C, C++, Multi-threading, TI SYSBIOS, TDA2H with Texas Instrument’s hardware engines IVA-HD, VPE.

Project #2: Developed Multi-Camera Surround View Driver Assistance System. Description: Involved in the development of Surround View System, developed the video pipe line from video capturing to rendering the video to display along with the overlay alpha bending on multi core TI vision platform and followed the NHTSA requirement.

 Key Activities:  Capturing Video from Image sensor  Scene Viewing Process  Fish-eye correction using calibration algorithm based on camera position  Merge Overlay with corrected image(overlay Alpha bending)  UART communication between ECU and cameras through LVDS channel  On the fly video brightness control  Video recording for accident investigation and theft tracking  Bowl view rendering through graphics processor  Unit and Integration testing

ENVIRONMENTS: C, C++, Multi-threading, TI SYSBIOS, GPU processor, TDA2H

2. Senior Staff Engineer at ____Technologies.

 Project #1: Developed the 2D-3D Video algorithms on Quartics SoC (QV -1751) Description: Developed the DDD ‘s 2D-3D Video Algorithms on Quartics VLIW architecture QV1751, achieved 1920x1080 resolution video at 30fps play back on QV1751 processor running at 230MHz.

ENVIRONMENTS: C, ARM, Quartics DSP (QV1751)

Project #2: Video Decoder (H.264, 1080p) Development on Quartics Video SoC Description: Developed H.264 Video decoder (1920 x 1080 30fps play back) on Quartics Video Chip QV 1721 (VLIW Architecture) that is specially designed for video accelerating applications (Net Books, Set top boxes), implemented the Firmware for MC, Entropy Coding and Deblock Filter modules. Proposed the Hardware changes to split Entropy Coding Module into i) Entropy decoding, UVLC encoding ii) UVLC decoding modules and Implemented the Firmware to playback Blu-Ray streams (above 30MBPS)

ENVIRONMENTS: C, ARM, Quartics DSP (QV1751)....